To perform transfer, discard, priority control, and the like of a frame in a router, a switch, or a bridge, search processing is necessary to decide processing according to an input frame. In search processing, information necessary for the search, for example, header information (to be referred to as frame information hereinafter) of a frame such as an IP address is extracted from an input frame, and the frame information is compared with a search condition, thereby outputting a result.
A search processing apparatus includes a search table that stores a plurality of search conditions (entry information), and a comparison circuit that compares frame information with data in the search table and performs matching determination. In the search processing, the apparatus accesses the search table every clock cycle, reads out a search condition, and compares it with frame information. This search processing is executed as many times as the total number of entry information, and access to the search table occurs as many times as the number of entry information. Power is consumed in each access to the search table.
On the other hand, when there are a lot of search conditions, or high-speed search processing is required, search processing is performed simultaneously for a plurality of pieces of frame information. To do this, an arrangement including parallelly arranged comparison circuits is employed. Such an arrangement is disclosed in, for example, literature “M. Urano, T. Kawamura, S. Ohteru, H. Suto, K. Kawai, R. Kusaba, N. Miura, J. Kato, A. Miyazaki, T. Hatano, S. Yasuda, N. Tanaka, S. Shigematsu, M. Nakanishi, T. Shibata, “The 10G-PON OLT and ONU LSIs for the coexistence of 10G-EPON and GE-PON toward the next FTTH era”, 2011 Symposium on VLSI Circuits (VLSIC), pp. 132-133, 15-17 Jun. 2011”. In the arrangement disclosed in this literature, eight pieces of frame information are processed in parallel. In addition, a search for one piece of frame information is done by parallelly performing eight comparison processes. When a plurality of pieces of frame information are processed by a plurality of comparison circuits in parallel, search table data is distributed to the plurality of comparison circuits by one access to the search table. That is, when the plurality of comparison circuits perform parallel processing, the time of access to the search table necessary for search processing of frame information in equal number shortens.